Academics > Departments

Electronics and Communication Engineering (ECE)

Dr M. Sumalatha

Assistant Professor |

B.E/B.Tech: Electronics and Communication Engineering, JNTUH & 2005
M.E/ M. Tech: VLSI System Design, JNTUH & Jan-2010
PhD: Signal Processing Through VLSI,JNTUK & 2021

Teaching Experience: 18 Years
AICTE ID: 1-440567401
SVECW ECAP ID: 493
Vidwan ID: 262462
Ratification Status: NO

  • B. Tech project guidance: Guided more than 100 students.
  • Number of journals published:16
  • Number of conferences attended:02
  • Guest lectures delivered:02
  • Life Time Member of Indian Society for Technical Education (LMISTE) :-ID-LM 59355
  • Institute for Engineering Research and Publication (IFERP)
  • Signal Processing Through VLSI
  • VLSI Design
  • Low Power VLSI
  • Signals &Systems
  • Digital Signal Processing
  • Digital System Design
  • Digital Image processing
  • Control Systems
  • M. V. Ganeswara Rao · N. Ramanjaneyulu · N. P. Dharani · M.Sumalatha, K. Rajesh Babu ·Kallepelli Sagar “Exploring High‑Temperature Reliability of 4H‑SiC MOSFETs: A Comparative Study of High‑K Gate Dielectric Materials” Transactions on Electrical and Electronic Materials Volume 24, Issue VI https://doi.org/10.1007/s42341-023-00497-x- Springer.
  • Venkateswara Rao Tumati, Swathi Nallagachu, Srinivas Yendra, Sumalatha Madugula “Development of Pre-Alarming System for Fisherman Security” European Chemical Bulletin, Eur. Chem. Bull. 2023, 12 (S3), 5575 – 5582, DOI: 10.31838/ecb/2023.12.s3.624.
  • Dr.V.S.R.Kumari, . M.Sumalatha .P. Nagasekhar ,M. Mounika “ Vedic Multiplier Design and Power Analysis” International Journal of Gender, Science and Technology, UGC Care Group I Journal, ISSN: 2040-0748 Vol-11 Issue-02 2022.
  • M.Sumalatha “IOT Based E-Circular System for College” The International journal of analytical and experimental modal analysis, ISSN NO: 0886-9367, Volume XIV, Issue VI, June/2022.
  • M.Sumalatha “Advanced ATM Crime Prevention System by Using WSN” The International journal of analytical and experimental modal analysis, ISSN NO: 0886-9367, Volume XIV, Issue V, May/2022.
  • A.Ravi,Anees Ahmad Baig, P.Sekhar Babu, M.Sumalatha “Covid-19 Detection Using Chest Xray By Deep Learning”, GIS Science Journal, ISSN No:1869-9391,volume no.9 issue no.3,March 2022.
  • A.Ravi,Anees Ahmad Baig, P.Sekhar Babu, M.Sumalatha “Deep Learning based efficient digit recognition system”, GIS Science Journal, ISSN No:1869-9391,volume no.9 ,issue no.3,March 2022.
  • Dr. P.Sekhar Babu , Dr.V.S.R.Kumari, .M.Sumalatha , M.Sundara Rao “Inexact MAC Step-Up Design for Digital Signal Processing” Parishodh Journal, ISSN NO:2347-6648, Volume X, Issue I, January/2021.
  • M.Sumalatha, P.V. Naganjaneyulu ,and K.Satya Prasad “Low power and Low Area VLSI implementation of Vedic design FIR filter for ECG signal de-noising”, in Microprocessors and Microsystems(ELSEVIER), 2019, https://doi.org/10.1016/j.micpro.2019.102883 (Impact factor: 1.161 SCI).
  • M.Sumalatha, P.V.Naganjaneyulu, and K.Satya Prasad “ Low Power and Low Area VLSI Implementation of Radix- 8 Carry Look ahead Adder FIR Filter for DSP Applications” , in Journal of Advanced Research in Dynamical & Control Systems, 1943-023X, Vol. 10, 10-Special Issue, pp. (70-82).( Impact factor :0.27, Scopus) -2018.
  • Sumalatha Madugula, Panchala Venkata Naganjaneyulu and Kodati Satya Prasad “Implementation of FIR filter for Low Power and Area minimization using Shift – Add method without multipliers”, in International Journal of Intelligent Engineering and Systems, Vol.10, No.6, DOI: 10.22266/ijies2017.1231.27. Impact factor :1.03 UGC Approved& Scopus)- 2017.
  • M.Sumalatha, P.V.Naganjaneyulu, and P.sekhar babu “ Encumbered Constancy Least Mean Square Algorithm for AEC’s in Mobile Communication Systems “ in International Journal of Emerging Technology and Advanced Engineering, ISSN 2250-2459, Volume 6, Issue 5, May 2016.
  • M Sumalatha, P .V .Naganjaneyulu and K .Satya Prasad “Advanced Fast Fourier Transform Using Radix-8 Booth Multiplier”,in International Journal of Electrical and Electronic Engineering &Telecommunication ,ISSN 2319 – 2518, Special Issue, Vol. 1, No. 3,pp (27-32).( Impact factor: 0.454 , Scopus )- 2015.
  • M Sumalatha, K.vidya sagar and M.sundara rao “MEMS based Wheel chair for physically challenged persons” published in Communications on Applied Electronics (CAE) – ISSN: 2394-4714 volume 2 – No.4, July 2015.
  • M Sumalatha, K.vidya sagar and K.swathi “Eco-friendly Environment with RFID Communication Imparted Waste Collecting Robot” published in Journal of Academia and Industrial Research (JAIR), ISSN: 2278-5213 Vol. 4, Issue 2 July 2015.
  • M Sumalatha, K.vidya sagar and SK.Ahmadsaidulu “Rope Climbing Robot” published in International Journal of Computer Applications (0975 – 8887), Volume 108 – No 12, December 2014.
  • M. Sumalatha, P. V. Naganjaneyulu and.K. Satya Prasad “Low-Power and Area-Efficient FIR Filter Implementation Using CSLA with BEC”, on Microelectronics, Electromagnetics and Telecommunications© Springer Nature Singapore Pte Ltd, volume 471, pp (137-142) https://doi.org/10.1007/978-981-10-7329-8_14, Springer Lecture Notes-2018.
  • M. Sumalatha, P. V. Naganjaneyulu and.K. Satya Prasad “Advanced Fast Fourier Transform using Radix-8 Booth Multiplier” on VLSI Design, Signal Processing, Image processing, Communications and Embedded Systems at JNTUK, Kakinada during 6th -7th NOV, 2015.Published a paper on Special Issue, Vol. 1, No. 3, November 2015.

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  • Obtained GATE Score of 270,All Indiarank:6433 in 2007.
  • Best Researcher Award received for the academic year 2021-2022 by Raja Rammohun Roy National Agency, Reg No: 3222 Department of Higher Education, New Delhi.
  • Journal of signal processing systems.
  • International Conference on social and sustainable innovations in technology and engineering by chair.
  • Completed Course on “Introduction To Machine Learning” Instructor: Prof: Sudeshna Sarkar, IIT Kharagpur –NPTEL.
  • Completed Course on “Ethical Hacking” Instructor: Prof. Indranil Sen Gupta, IIT Kharagpur –NPTEL.
  • Completed Course on “Digital Circuits ”Instructor: Prof.Santanu Chattopadhyay, IIT Kharagpur –NPTEL.
  • Completed Course on -Wireless Communications for Everybody- Coursera
  • Coordinator for National Level Workshop on Image Processing & Computer Vision on September 8th 2018.
  • Co-Convener for National Level Technical Symposium (Medho Spurthi 2K20) on Jan 9th & 10th, 2020.
  • Convener for National Level Technical Symposium (SPURTHI’11) on March 11th, 2011.
  • Attended a One Week Workshop on “VLSI system design –Silicon to End Applications Approach” Organized by AICTE Duration from 31.07.2023 to 04.08.2023.
  • Attended Faculty Development Program Organized on “Introduction to machine learning” by NPTEL-AICTE, Duration of 8 Weeks (July-September 2023).
  • Attended Faculty Development Program Organized on “Ethical Hacking” by NPTEL-AICTE, Duration of 8 Weeks (July-September 2023).
  • Attended A Five day ISTE approved Online/SF-STTP/FDP Program on “Design Challenges and Opportunities in VLSI” organized by S.R.K.R Engineering College, Bhimavaram, duration from 09.10.2023 to 13.10.2023.
  • Attended “One-week Online Faculty Development Programme (FDP) on “AI Enabled AR/VR in Communications & Signal Processing Application”, Organized by Department of Electronics and Communication Engineering, Nalla Narasimha Reddy Education Society’s, Hyderabad, Duration from 03.10.2023 to 07.10.2023.
  • Attended a Five day Online Faculty Development Programme (FDP) on “5G Networks and Beyond” Organized by JCT Engineering and Technology, Duration from 22.08.2023 to 26.08.2023.
  • Attended a One Week National Level Faculty Development Program on “Recent An approach through AI & ML” organized by Vignan’s Nirula Institute of Technology and Science for Women, Guntur Duration from 21.08.2023 to 26.08.2023.
  • Attended a One Week National Level Faculty Development Program on “Cloud Infrastructure” Collaborated with Brainovision and AICTE Organized by Sai Spurthi Institute of technology Duration from 21.08.2023 to 25.08.2023.
  • Attended a two Day National Level Faculty Development Program on RTL to GDSII using Cadence Tools organized by Department of ECE, School of Engineering& Technology , CMR University association with Entuple Technologies, Duration from 17.08.2023 to 18.08.2023.
  • Attended a One Week Faculty Development Program on “Recent Trends in VLSI Signal Processing” organized by Sri Venkateswara College of Engineering and Technology, Chittoor, Duration from 24.07.2023 to 28.07.2023.
  • Attended One Week Faculty Development Program on “Antennas for 5G Communication& beyond” Organized by Aditya Engineering College in association with IETE Duration from 03.07.2023 to 08.07.2023.
  • Attended One Week National Level Online Faculty Development Program on “Societal Applications of Machine Learning” organized by Shri Vishnu Engineering College for women Duration from 24.07.2023 to 28.07.2023.
  • Attended a Five Day Faculty Development Program on “Advanced Communication Systems” organized by Lakireddy Bali Reddy College of Engineering, Duration from 05.06.2023 to 09.06.2023.
  • Attended “Two day National Level Seminar on “Applications of MIMO Health Care Industry” Supported by DST-SERB Organized by Sai Spurthi Institute of Technology Duration from 05.06.2023 to 06.06.2023.
  • Attended Course on “Energy Literacy Training” course spanning over 12 modules Organized by Energy Swaraj Foundation with AICTE Honor Code ELT23-7-d271.
  • Attended One Week Faculty Development Program on “Full Custom and Semi-Custom Flow in Cadence Design Tools” organized by S.R.K.R Engineering college Duration from 14.03.2023 to 18.03.2023.
  • Attended Five Day Faculty Development Program on “Amazon web services” Collaborated with Brainovision and AICTE, GITAM deemed to be organized by University. T.S Duration from 22.08.2022 to 27.08.2022
  • Attended a Five Day Faculty Development Program on “Recent trends in Communication Systems” organized by Lakireddy Bali Reddy College of Engineering, Duration from 21.06.2022 to 25.06.2022.
  • Attended a Five Day Faculty Development Program on “Emerging trends in artificial intelligence” organized by Bhimavaram Institute of Engineering &Technology,Bhimavaram, Duration from 25.05.2022 to 31.05.2022.
  • Attended “Recent Advances in Signal Processing” FDP Organized by AICTE ATAL & Jawaharlal Nehru Technological University Kakinada, from 02.08.2021 to 06.08.2021.
  • Attended “Embedded UVM open Source Emulation & Functional Verification” Organized by Electronics & ICT Academy Supported by Ministry of Electronics And Information Technology (Meity), Govt. Of India Indian Institute of Technology Guwahati, from 13.07.2020 to 24.07.2020.
  • Attended “Research Trends in VLSI, Communications & Signal processing” FDP organized by Department of Electronics and Communication Engineering, Bapatla Women’s Engineering College, Bapatla, Andhra Pradesh during 8th to 10th July, 2021.
  • Attended “Digital IC Design With DFT Concepts Using Mentor Graphics Tools” Organized by Department of ECE In Collaboration With APPLY VOLT. Mahaveer Institute of Science & Technology 29.06.2020 to 01.07.2020.
  • Attended “Research Areas in Biomedical Signal Processing” FDP Organized by Department of Electronics and Communication Engineering, Sri Vasavi Engineering College (A), Tadepalligudem, 21.06.2021to 26.06.2021.
  • Attended “Hands-On Experience with Arduino Using Virtual Tool” FDP Organized by PSCMRCET in association with PSCMR IEEE Student Chapter and IIC-MHRD from 25-06-2020 to 27-06-2020.
  • Attended “An Emerging Paradigm of Low Power Computational VLSI Design” organized by BV Raju Institute of Technology, from 16.06.2020 to 20.06.2020.
  • Attended “Recent Trends in Computer Architecture, VLSI And Embedded Systems” FDP Organized by RGM College of Engineering, Nandyala from 08.06.2020 to 13.06.2020.
  • Attended “CMOS Circuit Design In Cadence Virtuoso In 180nm” FDP Organized by IEEE- Student Branch (STB 10084) Of K.Ramakrishnan College of Technology, Samayapuram from 19.06.2020 to 20.06.2020.
  • Attended “Advanced Antenna Design Using HFSS” FDP Organized by Department of ECE, Santhiram Engineering College, Nandyal in collaboration with Vardhaman College of Engineering, Hyderabad from 12-05-2020 to 17-05-2020.
  • Attended “Modern Research Trends in Communication, Signal Processing and VLSI /MEMS” FDP Organized By Andhra Loyola Institute of Engineering And Technology, Vijayawada, From 19.05.2020 to 23.05.2020.
  • Attended “VLSI IC Design Flow” FDP Organized by Anurag University, Medchal, from 28.05.2020 to 30.05.2020.
  • Attended “SCILAB” Organized by PSCMRCET in association with Spoken Tutorial, IIT Bombay-PMMMNMTT from 29.04.2020 to 03.05.2020
  • Attended “System Design Aspects in IOT” Organized by the E & ICT Academy, National Institute of Technology, Warangal on 26.06.2018 to 02.07.2018.
  • Attended “Mixed VLSI System Design using Cadence Tools” Organized by the E & ICT Academy, National Institute of Technology, Warangal on 11.06.2018 to 16.06.2018.
  • Attended “Speech & Image Processing” Organized by the E & ICT Academy, National Institute of Technology, Warangal on 10.04.2017 to 15.04.2017.
  • Attended “Research Methodologies” Jawaharlal Nehru Technological University Kakinada, From 01.05.2015 to 15.05.2015.
  • Attended “Intellectual Property Rights and Patents” Jawaharlal Nehru Technological University Kakinada, From 16.05.2015 to 30.05.2015.
  • Attended Faculty Updation Program on VLSI Design organized by C-DAC from 02-06- 2014 to 07-06-2014 at C-DAC Hyd.
  • Attended the workshop on Signals and Systems under the National Mission on Education through ICT (MHRD, Govt, of India) from 02-02-2014 to 12-02-2014 conducted by IIT Kharagpur.
  • Attended the workshop on Analog Electronics under the National Mission on Education through ICT (MHRD, Govt, of India) from 04-06-2013 to 14-06-2013 conducted by IIT Kharagpur.
  • Attended workshop on VLSI Design using Mentor Graphics Tools during 23-24 August 2012 organized by ECE Dept., SVECW, Bhimavaram
  • Counselling and Mentoring Cell member
  • SPOC for IIT Bombay collaborative UG projects.
  • ECE-SPOC for AICTE-IDEA lab Programs.
  • Dealing VLSI special labs
  • In-charge for VLSI LAB.