Professor & HOD |
B.E/B.Tech: E&IE, Kakatiya University, 1994
M.E/M.Tech: Digital Systems and Computer Electronics, JNTUH, 2007
PhD: Digital Image Processing, JNTUH, Hyderabad 2014
Teaching Experience: 24 years
Industrial experience: —
AICTE ID: —
SVECW ECAP ID: 411
Vidwan ID: 149610
Ratification Status: Ratified
- Number of UG projects guided. 34
- No. of PG Projects Guided: 28
- No.of Ph. D guided:01
- No. of Ph. D guiding: 01
- Resource Person for AICTE sponsored ATAL One Week Faculty Development Programme on ADVANCEMENTS IN NANOSCALE VLSI DESIGN: ENABLING NEXT GENERATION INTEGRATED CIRCUITS during 11 -16 December 2023
- Resource person for ISTE Sponsored FDP On Design Challenges and Opportunities in VLSI, organized by SRKR Engineering College, during 9-13 October 2023
- Resource Person for AICTE Sponsored for Design Thinking and Prototyping for Industry 4.0″ organized by the SVECW-AICTE IDEA LAB at Shri Vishnu Engineering College for Women (Autonomous) during 20 – 25 November 2023.
- Invited Talk on Design of Assistive Technology Devices: A Project Based Learning Approach, IEEE Vizag Bay Section 21st October 2020
- Invited Talk on Development of Low-Cost Assistive Technology Solutions to Aid Differently Abled People, IEEE Hyderabad Section 30th April 2020
- Resource Person for the ATAL FDP on Assistive Technologies organized by National Institute of Technology AP (NIT-AP) on 2-12-2019
- Delivered a guest lecture on Human Assist Devices for Differently abled in SRM IST, Chennai on 29-2-2020
- Resource Person for One day Workshop on Analog Discovery Kit during AAMT Conference, February 2013
- Resource Person for IETE Sponsored Two day Workshop on Analog Discovery Kit
- Resource Person for Workshop on Microcontrollers 2011 at Shri Vishnu Engineering College for Women Bhimavarm 11. Gave a Lecture on Assistive Technology at University of Massachusetts , Lowell, USA in January 2013
- Visited University of Massachusetts , Lowell, USA, University of NewHampshire, USA and Georgia Tech University, Atlanta USA in January 2013
- Member of editorial board for Science Journal of Circuits, Systems and Signal Processing
- Convener of the Seventh International Conference on Micro Electronics, Electro Magnetics and Tele Communication (ICMEET2022) organized at SVECW during July 22-23,2022.
- Convener for AICTE sponsored ATAL One Week Faculty Development Programme on ADVANCEMENTS IN NANOSCALE VLSI DESIGN: ENABLING NEXT-GENERATION INTEGRATED CIRCUITS during 11 -16 December 2023 16 Editor of the book “Advances in Signal Processing, Embedded Systems and IoT” published by Springer in 2023. ISBN: 9789811988646
- IIC Ambassador Certified as Institute Innovation Council Ambassador for Intellectual Property and Patent Rights by Ministry of Human Resources, Government of India Patents
- A patent is filed for the project “E-Stick for the Visually Challenged”. The inventors of this project are: 1. Dr. K. Padma Vasavi 2. Dr. G. Srinivasa Rao – – Patent Number: 5765/CHE/2013, dated 13th December 2013 Electronic Hardware Outer Case Design Title of the Invention:-An Electronic Walking stick for Visually Challenged people’
- A patent is filed for the project “Telugu Word trainer for the Mentally Challenged”. The inventors of this project are: 1. Dr. K. Padma Vasavi 2. Dr. P. V. V. Rama Rao – – Electronic Hardware Outer Case Design Patent Number: 5939/CHE/2014dated 27/11/2014
- A patent is filed with the title “Self-Handled Braille-Character Printer for Blind People” with Patent number 201741010946 filed on 28-Mar-17
- Member IEEE/ISTE… etc :-ID
- Digital Image Processing
- Digital Image Processing, Digital Signal Processing, Machine Learning, Deep Learning, VLSI Architectures for Signal Processing, Embedded Systems, IoT
- Kandula, BS, Kalluru, PV, Inty, SP. Design of area efficient VLSI architecture for carry select adder using logic optimization technique. Computational Intelligence. 2020; 1– 11. https://doi.org/10.1111/coin.12347 (SCI Journal), Wiley Publisher
- BalaSindhuriKandula, K.Padma Vasavi, I.Santi Prabha “Area and Power Potent VLSI Architecture for Modified CSLA with A Logic Optimization Technique” International Journal of Innovative Technology and Exploring Engineering (IJITEE), Volume-8 Issue-12, October 2019, pp.2873-2879, ISSN: 2278-3075(Scopus Indexed Journal).
- BalaSindhuriKandula, K.Padma Vasavi, I.Santi Prabha “Design and Implementation of FIR Filter using Efficient MAC”IJITEE Journal-Scopus Indexed Journal)
- BalaSindhuriKandula, K.Padma Vasavi, I.Santi Prabha “Implementation of Reconfigurable FIR Filter using Logic Optimization Technique ”(Accepted for publication in IJAST Journal-Scopus Indexed Journal)
- K. Padma Vasavi, “A Mind Operated Computer Mouse using Discrete Wavelet Transforms for Elderly People with Multiple Disabilities”, Procedia of Computerscience International Journal Published by Elsevier and indexed in Scopus, DOI: 10.1016/j.procs.2016.05.205
- BalaSindhuriKandula, K. Padma Vasavi and I. Santi Prabha, “Area Efficient VLSI Architecture for Square Root Carry Select Adder using Zero Finding Logic”, Procedia Computer Science 89 ( 2016 ) pp 640 – 650 published by Elsevier B. Vand indexed in Scopus
- K. Padma Vasavi, Dr M. Madhavi Latha, Dr E.V.Krishna Rao, N. Udaya Kumar, “An Edge Detection Scheme for Endodontic Working Length Measurement in Root Canal Treatment for Succedaneous Teeth” Latest Trends in Circuits, Systems, Signal Processing and Automatic Control, Proceedings of 5thInternational Conference on Circuits, Systems, Control, Signals (CSCS ’14) at Salerno Italy held from 4-5th of June, 2014, ISSN: 1790-5117. ISBN: 978-960-474-374-2 pp 306-313,2014 Scopus Indexed Paper.
- K. Padma Vasavi, N. Udaya Kumar, Dr. E. V. Krishna Rao, Dr. M. Madhavi Latha ,”A Novel Edge Detection using Laplacian Pyramid and Directional Filter Bank with a Statistical Thresholding”, IAENG Letters, 2011Scopus Indexed Paper.
- K.BalaSindhuri, K.Padma Vasavi, I.Santi Prabha “Realization of a Low Power and Area-Efficient VLSI Architecture for Carry Select Adder using Multiplexer” SCIREA Journal of Electrics, Communication, Vol.2, Issue 1, February 2019(Free Journal)
- K. Padma Vasavi, N. Udaya Kumar, N. Siva Prasad, “Development of Mitthar-The Companion Robot for Lonely Elderly People” International Journal of Electronics and Communication Engineering and Technology (IJECET), Volume 8, Issue 3, May–June 2017
- D. Bhavani, K. Padma Vasavi, “An Efficient VLSI Architectures for FIR Filter in Fixed and Reconfigurable Applications”, IOSR Journal of VLSI and Signal Processing (IOSR-JVSP), Vol 7 – Issue 4, Jul. – Aug. 2017doi: 10.9790/4200 0704016372
- K. Padma Vasavi, “High-Performance VLSI Architecture for AES-GCM Algorithm with Sub Pipelining”,International Journal of VLSI Design and Communication System , vol.2, Issue 10, November 2014, pp 1019-1024.
- K. Padma Vasavi, “Assistive Technology at Shri Vishnu Engineering College for Women: Igniting Young Minds for Innovation”, International Journal of Engineering Education and Transformation, issue 116, vol. 29, no.4, pp66-72, April, 2016
- K. Padma Vasavi “ A Mind Controlled Mouse using Discrete Wavelet Transforms and Independent Component Analysis for Elderly People with Multiple Disabilities” International Journal of Basic and Applied Biology ISSN(print): 2394-5820, Vol:2, No:6,July-September 2015, pp 352-358
- K. Padma Vasavi, “An Area Efficient VLSI Architecture For DA-Based Reconfigurable FIR Filter” , IMRF journals
- K. Padma Vasavi, Dr M. Madhavi Latha, Dr E.V.Krishna Rao, N. Udaya Kumar. “Performance Evaluation of Adaptive Statistical Thresholding in Edge Detection using GLCM in wavelet Domain under Noisy Conditions”, ICGST- GVIP Journal, pp 35-44, Volume 10, issue 3, August 2010
- K. Padma Vasavi, Dr M. Madhavi Latha, Dr E.V.Krishna Rao, N. Udaya Kumar. “A Novel Statistical Thresholding In Edge Detection Using Laplacian Pyramid And Directional Filter Banks”, ICSPIE 2010, 20-22 October, 2010, San Francisco, USA.
- N.Udaya Kumar, K. Padma Vasavi, E. V. Krishna Rao, M. MadhaviLatha, “An Irregular Shaped Region of Interest Based Intelligent Image Compression Using Direction Adaptive Filter Banks”, International Journal of Engineering and Advanced Technology (IJEAT) ISSN: 2249 – 8958, Volume-3, Issue-3, February 2014 , pp 43-48
- K. Padma Vasavi, “A Scale Invariant Human Motion Detection System using Wavelet Based Feature Extraction”, International Journal of Electronics Communication and Computer Engineering”,volume-5, issue-3,May 2014
- R.Sushmitha,.K.Padmavasavi,” Pattern identification training system for children with autism ”, International Journal of Engineering Research and Technology,Vol.1 – Issue 5 (July – 2012).
- K. Padma Vasavi, A. Raja Sree “A High Speed VLSI architecture for Digital Speech Watermarking with Compression”, VOL. 2 NO. 2,3,4 – Interscience Journals
- K. Padma Vasavi, “An Overview of Brain Communication Interface for Communication and Control”, International Journal of Engineering & Technical Research,April-2014
- K. Padmavasavi,” An efficient color code based coding using Quadtree Decomposition for color images”, Journal of World Science Academy Press,2011,1(8):26-31,ISSN:2231-2587
- K. Padma Vasavi, “High-Performance VLSI Architecture for AES-GCM Algorithm with Sub Pipelining”,International Journal of VLSI Design and COmmunication System , vol.2, Issue 10, November 2014, pp 1019-1024.
- K. Padma Vasavi, “Assistive Technology at Shri Vishnu Engineering College for Women: Igniting Young Minds for Innovation”, International Journal of Engineering Education and Transformation, August 2015
- K. Padma Vasavi “ A Mind Controlled Mouse using Discrete Wavelet Transforms and Independent Component Analysis for Elderly People with Multiple Disabilities” International Journal of Basic and Applied Biology ISSN(print): 2394-5820, Vol:2, No:6,July-September 2015, pp 352-358
- K. Padma Vasavi, “A Mind Controlled Mouse using Discrete Wavelet Transforms and Independent Component Analysis for Elderly People with Multiple Disabilities”, ABECBAB-2015, organized by Jawaharlal University, Delhi 25-26 July, 2015.
- K. Padma Vasavi, “An Area Efficient VlSI Architecture For DA-Based Reconfigurable FIR Filter” , IMRF journals
- K.Padma Vasavi, B. Sujita, “ Low Power Area Efficient VLSI Architecture for Shift Register using Explicit Pulse Triggered Flipflop Based on Signal FeedThrough Scheme”, IOSR Journal of VLSI &Signal Processing,vo.6, issue 5 ver.1, Sep Oct2016
- K. Padma Vasavi, B.Sujita, “ Performance Evaluation of VLSI Architectures for Explicit Pulse Triggered Flipflops used in Shift Register, IJVDCS, vol-4, JAN DEC2016, ISSN-2322-0929
- M. V. Subbarao, J. T. S. Sindhu, N. N. S. Harshitha, K. P. Vasavi, A. S. Krishna and G. C. Ram, “Detection of Retinal Degeneration via High-Resolution Fundus Images using Deep Neural Networks,” 2023 Second International Conference on Electronics and Renewable Systems (ICEARS), Tuticorin, India, 2023, pp. 955-960, doi: 10.1109/ICEARS56392.2023.10085273.
- M. V. Subbarao, J. T. S. Sindhu, Y. C. A. Padmanabha Reddy, V. Ravuri, K. P. Vasavi and G. C. Ram, “Performance Analysis of Feature Selection Algorithms in the Classification of Dry Beans using KNN and Neural Networks,” 2023 International Conference on Sustainable Computing and Data Communication Systems (ICSCDS), Erode, India, 2023, pp. 539-545, doi: 10.1109/ICSCDS56580.2023.10104809.
- K.BalaSindhuri, K.Padma Vasavi, I.Santi Prabha “Realization of a Low Power and Area-Efficient VLSI Architecture for FIR Filter using modified MAC” Next Generation Computing Technologies-2018,Dehradun,21st-22nd November,2018 (Accepted for inclusion in Springer Series)
- K.BalaSindhuri, K.Padma Vasavi, I.Santi Prabha “Reconfigurable FIR Filters-A survey” International conference on Smart Systems and Inventive Technology [ICSSIT 2018],Coimbatore, December 13- 14, 2018.(Published in IEEEXPLORE)
- K. BalaSindhuri, K. Padma Vasavi, A. Santhi Prabha, N. Udaya Kumar, “VLSI Architecture for Linear Carry Select Adder with Zero Finding Logic”, IEEE Conference on International Advanced Computing, 26-28 Feb 2016, Bhimavaram India
- K. Padma Vasavi, P. R. S. S. V. Raju, “An IOT Based Seeder Nozzle Blockage Detection System in Agriculture”, AET 2016 proceedings published by McGrawHill
- K. Padma Vasavi, “An Area Efficient VlSI Architecture For DA-Based Reconfigurable FIR Filter” , INTERNATIONAL ACADEMIC & RESEARCH CONFERENCE INDIA -2015, October 09- 10, 2015, Organized by IMRF with the encouragement of UNESCO In support of UNESCO’S 70th Anniversary Celebrations
- K. Padma Vasavi, Dr M. Madhavi Latha, Dr E.V.Krishna Rao, N. Udaya Kumar. “A New Bone Reposition Detection Scheme forperi apical Lesion Treatment in Dentistry”, The 2011 International Conference on Image Processing, Computer Vision, & Pattern Recognition(IPCV’11:July18-21,2011,USA)
- K. Padma Vasavi, Dr M. Madhavi Latha, Dr E.V.Krishna Rao, N. Udaya Kumar “Adaptive Statistical Thresholding in Edge Detection using GLCM in wavelet Domain”, International Conference on Recent Advances in Communication Engineering (RACE-08), Osmania University, Hyderabad, December 2008
- N.Udayakumar, K.PadmaVasavi,DrM.MadhaviLatha,DrE.V.KrishnaRao,”An ROI Based Image Compression system for SAR Imagery in Micro unmanned Air Vehicles for Border Security”,ICRAMAV-2012,December Campus,Hyderabad. 10-12,2012 JNTUH
- N. Udaya Kumar, Dr. E. V. Krishna Rao, Dr. M. Madhavi Latha, K. Padma Vasavi,“A Region of Interest Based Direction Sensitive Shape Oriented Compression Technique for Low Bit Rate Images”, 3rd International Conference on Emerging Trends in Computer and Image Processing (ICETCIP’2013), Jan 8-9, 2013, Kau la lumpur, Malaysia
- A. Rajasree, K. Padmavasavi,” VLSI implementation of digital speech watermarking with compression on Heterogeneous platform”, International conference on Electrical and Electronics Engineering held at Silver park hotel,Hyderabad during 11th Aug to 12th Aug 2012.
- K. Padmavasavi,” An efficient color code based coding using Quadtree Decomposition for color images” ICN-2010, Rural Engineering College, Bhalki
- K.Padma Vasavi,” Development of IEEE 1149.7 CJTAG TAP controller”, ICNEAC 2011,SCET, NARSAPUR JULY 8-10,2011.
- K.Padma Vasavi,” An Implementation of Sobel Edge Detection Technique using Virtex-II pro FPGA Processor”, ICNEAC-2011,SCET, NARSAPUR JULY 8 10,2011
- K. Padma Vasavi, “An E-Compass and RFID Based Navigation System for the Visually Challenged People”, International Conference Bio Medical Engineering and Assistive Technologies (BEATS-2010), NIT Jalandhar, Punjab
- K. Padma Vasavi, S. Radhika “ An FPGA Implementation of Pseudo Exhaustive Pattern Generators for Built in Self Test”, International Conference on Advances in Electrical, Electronics, Mechanical and Computer Science (ICAEEMS) 2013, Hyderabad
- K. Padma Vasavi, U. Sukruthi, “FPGA Implementation of Adaptive LMS Filter”, ICN-2010, Rural Engineering College, Bhalki National Conference
- K. Padma Vasavi, A. Raja Sree, “A Survey of Hardware Implementation Techniques for Digital Speech Water Marking”, NCRTC&IT, 2012
- Received a research grant of Rs. 65 Lakh as Chief Investigator for the project titled “Memory-Optimized Co-Processing Unit for Enhanced Edge AI”, funded by MEITY under C2S scheme.
- Co-Investigator for the DST sponsored project “Vishnu Foundation Technology Business Incubator” under Nidhi TBI scheme of DST SEED division in March 2021
- A research grant of worth Rs. 2.98 Crores is received for the Project “Science and Technology Innovation Hub at SVECW” by SEED Division of Department of Science and Technology in March 2020.
- A research grant of worth Rs. 36.2 Lakhs is received for the ATL project “Development of Comprehensible Communication System for Comatose and Elderly People with Multiple Disabilities” from Department of Science and Technology India in January 2014
- A research grant of worth Rs. 24 Lakhs is received for the project “Development of Motion Detection and Human Tracking System using a Scale Invariant Approach” from Department of Science and Technology India in April 2012
- Best Paper award in the International Conference INDIA 2022, held at BVRIT Hyderabad College of Engineering for Women, Hyderabad
- Distinguished Alumni-Class of 1994 from Kakatiya Institute of Technology and Science, Warangal in December 2019
- GYTI Appreciation Award from the office of the Honorable President of India in 2017 • Best Innovative Project for the DST sponsored project in IoT Conference in 2016
- Best Surgical Instrument- Impact in MEDIC 2019, National level Innovation camp organized by IIT Bombay
- Best Paper award in the International Conference ICAEEMCS organized by IRD India • Best performance in Teaching at SVECW (Received Gold Medal from the management)
- Received certificate of outstanding performance in Academic leadership among all the departments of Sri Vishnu Educational Society along with a gold coin
- Mentor for the following projects which won laurels at International and National Level Contests:
1. E-Stick for Blind and Deaf, Consolation Prize in the International Competition Imagine Cup-2010, Organized by Microsoft
2. E-Compass and RFID Based Navigation System for the Blind Winner of Second Runner up Prize shared with IIT Kharagpur and a cash award of 4,000 US Dollars in TI India Analog Design Contest organized by Texas Instruments India
3. Artificial Hand Gripper for Below Elbow Amputees, One among the top 5 entries in Home category of Innovation Jockeys-2011 organized by Yahoo and Accenture
4. Pattern Identification and Calculation Training System won consolation Prize in TI India Analog Design Contest 2013 and a cash award of Rs.10,000/-. This contest is organized by Texas Instruments India
5. Second Place in ITSAP Product Show case competition in Social Impact category in 2013 for the project Play and Learn System
6. Best Innovation Project in the 5th IoT Conference Organized by Government of Andhra Pradesh in 2016
- IET Journal of Signal Processing
- WSEAS Transactions
- Elsevier Microprocessors and Microcontrollers
- ECTI Transactions
- NPTEL Certificate in Image Processing
- Advanced Certificate course in Artificial Intelligence and Data Science from IIT Madras
- Co- Convener for AICTE Sponsored Faculty Development Program on “Next Generation Wireless Networks- Theory to Practice” 1-14 August, 2019
- Convener for Three Day Seminar on Assistive Technology and Rehabilitation Engineering” 1-3 December, 2018
- Convener for National Seminar on Assistive Technology 2017
- Workshop on Assistive Technology 2010, Shri Vishnu Engineering College for Women, Bhimavaram
- Workshop on Assistive Technology 2011, Shri Vishnu Engineering College for Women, Bhimavaram
- Workshop on Assistive Technology 2012, Shri Vishnu Engineering College for Women, Bhimavaram
- Workshop on Assistive Technology 2013, Shri Vishnu Engineering College for Women, Bhimavaram
- Workshop on Assistive Technology Solutions in Minutes 2013, Shri Vishnu Engineering College for Women, Bhimavaram
- A Faculty Development Program on “Labveiw Solutions for Biomedical Problems” Under TEQIP-II
- AICTE Sponsored Faculty Development Program on Challenges in FPGA Based Digital Systems Design, 2011
- Co-Convener for National Conference on Assistive Technology, at Padma Shri B. V. Raju Institute of Technology, Narsapur, Medak in 2011
- Technical Chair for National Conference on Advances in Assistive and Main Stream Technologies 2013 at Shri Vishnu Engineering College for Women Bhimavarm
- Coordinator for Technicians Development Program on “Embedded Systems from Theory to Practice for Technicians” 8-10 February, 2016
- Resource Person for Certificate Program on MATLAB Training September –October 2016, SVECW, Bhimavaram
- Organizer for College level Contest for Texas Instruments Analog Design Contest 2012, at Shri Vishnu Engineering College for Women Bhimavarm
- A Five Day Workshop on DSP using Lab View, 2011 at Shri Vishnu Engineering College for Women, Bhimavaram 14.
- A One day Complementary Workshop on MATLAB, at Vijayawada
- Workshop on Xilinx Tools, BVRIT Hyderabad
- Workshop on Micro wind Tools to implement VLSI Architectures, JNTUH, Hyderabad
- SDP on Challenges in FPGA based Digital Systems Design, SVECW, Bhimavaram
- FDP on Implementation of Image Processing Algorithms on NB2 Nano Board, Bhimavaram
- Five Day Workshop on Implementation of VLSI Architectures using Cadence Tools
Institution Level:
- Dean: Assistive Technology Lab
- Chairman: Internal Complaints Committee
- SPOC: Prof. Sanjay Ranka Program
- Coordinator: PFMS SVECW
- IIC Ambassador: Intellectual Property Rights and Patents
Department Level: Head of the Department
