Assistant Professor |
B.E/B.Tech: Electronics Engineering, Bharati Vidyapeeth College of Engineering, Pune, India, 2011
M.E/M.Tech: Microelectronics and Control systems, Dayananda Sagar College of Engineering, Bengaluru, India, 2013
PhD: VLSI (WBG based Power Semiconductor Device and Physics), Vellore Institute of Technology, Vellore, India 2023
Teaching Experience: 1 year
Research experience: 3 year
AICTE ID: 1-44424871280
SVECW ECAP ID: 498
Vidwan ID: 444600
Ratification Status: —
- Number of Phd/PG/UG projects guided…. 0
- Number of journals published….. 3
- Number of conferences attended….6
- Guest lectures delivered…3
- IEEE Electron Device Society Member
- VLSI
- Semiconductor device and physics
- Wide Bandgap based power devices
- Modelling and Simulation
- Nilesh Kumar Jaiswal and V. N. Ramakrishnan, “An Optimized Vertical GaN Parallel Split Gate Trench MOSFET Device Structure for Improved Switching Performance”, IEEE Access, vol. 11, pp. 46998-47006, 2023.
- Nilesh Kumar Jaiswal and V. N. Ramakrishnan, “A Comparative Analysis and an Optimized Structure of Vertical GaN Floating Gate Trench MOSFET for High-frequency FOM”, Semiconductor Science and Technology, 37(7), pp. 075001, 2022.
- Nilesh Kumar Jaiswal and V. N. Ramakrishnan, “Vertical GaN Reverse Trench-Gate Power MOSFET and DC-DC Converter”, Transactions on Electrical and Electronic Materials, 22, pp. 363-371, 2021.
- Nilesh Kumar Jaiswal and V. N. Ramakrishnan “A Vertical GaN Split Gate Trench MOSFET Device with Switching Energy Losses”, Book Series, Springer Proceeding in Physics (Accepted).
- Nilesh Kumar Jaiswal, V. N. Ramakrishnan and S. D. Roy, “Vertical GaN Split Gate Trench MOSFET with Improved High Frequency FOM”, IEEE 17th India Council International Conference (INDICON), pp. 1-5, Dec. 2020.
- Nilesh Kumar Jaiswal, V. N. Ramakrishnan and S. D. Roy, “Optimization of Vertical GaN based SGT-MOSFET for Low On-resistance”, IEEE Workshop on Wide Bandgap Power Devices and Applications in Asia (WiPDA Asia), pp. 1-5, Sep. 2020.
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- InSc Young Researcher Award, 2021, Institute of Scholars, India.
- Best Oral Presentation Award, 2021, World Nano Congress on Advanced Science and Technology, VIT Vellore
- SRF-Direct fellowship, CSIR-HRDG [2019-2022]
- Scholarship via GATE qualification, AICTE, India [2011-2013]
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- Hands-on training on “Technology Development with TCAD” using Synopsys Sentaurus TCAD software on 29-30 April, 2019 at Kalasalingam Academy of Research and Education, Krishnan Kovil, Tamilnadu, India.
- Delivered a lecture and three days of hands-on training on “Power Semiconductor Devices Modeling & TCAD Simulation” using Synopsys Sentaurus TCAD software on 29-01 December 2019 at VIT, Vellore, Tamilnadu, India.
- A focus discussion and hands-on training on “Power LDMOS Device” using Synopsys Sentaurus TCAD software on 11 January 2019 at Karunya University, Coimbatore, Tamilnadu, India.
- INUP-i2i 2023 online Familiarization Workshop on Nanotransistors & Energy devices Technology, IIT Guwahati, Feb. 21-23, 2023.
- INUP hands-on training on “Fabrication and Characterization of P-N Junction Diode and MOS Capacitors” at IIT Madras, Aug. 22-30, 2022.
- FDP on “Nanoscale Devices and Circuits” at NIT Warangal, Jun. 17-22, 2019.
- FDP on “Modeling and Simulation of Nano-Transistors” at IIT Kanpur, Jan. 21-25, 2019.
- National workshop on “Functional Materials” at VIT Vellore, Mar. 24, 2021.
- INUP familiarization workshop at IISc, Bangalore, Nov. 28-30, 2016
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