Associate Professor |
B.E/B.Tech: ECE,JNTU Kakinada & 1996
M.E/M.Tech: Digital Systems and Computer Electronics, JNTU Anantapur, 2006
PhD: VLSI Architectures for Image compression,JNTU Kakinada, & Pursuing
Teaching Experience: 25 years
AICTE ID: 1-457749063
SVECW ECAP ID: 405
Vidwan ID: 149741
Ratification Status: Ratified
- M.Tech. guidance: Guided 18 students
- B.Tech. project guidance: Guided 110 students
- No. of journal publications: 19
- No. of conference proceedings & paper presentations: 45
- No. of guest lectures delivered: 02
- Member ISTE – 53935
- MIETE – M 223247
- FIE -123760-0
- VLSI Design & Image Processing
- IC Applications,
- Physical Design,
- Digital IC Design
- V.Srinivasa Rao, Dr P.Rajesh Kumar, G V Hari prasad, M.Prema Kumar, S.Ravichand “Discrete cosine transform Vs discrete wavelet transform: An objective comparison of image compression techniques for JPEG Encoder” at International Journal of Advanced Engineering & Applications (STEPS 2010) on Jan 2010, A STEPS Education Initiative.
- B.Madhavi,V.SrinivasaRao “Implementation Of High Speed Low Power Double Tail Comparator Using Hspice” at International Journal of Electrical and Electronics Engineers(IJEEE) on Nov 21-22,2015,vol 7 at JNU,Delhi.
- M. Prema Kumar, V.Srinivasa Rao, Dr.P.Rajesh Kumar, “Removal of High Density Noise in Digital Images using Decision based IQA Algorithm”,at International Journal of Electronics & Communication Technology IJECT Vol. 2, SP-1, Dec. 2011.
- K.Bhuvaneswari, V. Srinivasa Rao, “Dynamic partial reconfiguration in low cost FPGAs”, International journal of Advance in Electronic & Electronic Engineering, Vol.3,No.2,pp.249-259,ISSN:2231-1297,September 2013
- K.Bhuvaneswari, V.Srinivasa Rao ,“Dynamic Partial Reconfiguration in Low-Cost FPGAs”, at International Journal of Scientific & Engineering Research, Volume 4, Issue 9, September-2013
- K.Bhuvaneswari ,V. Srinivasa Rao, “Dynamic partial reconfiguration in low cost FPGAs”,International journal of Scientific & Engineering Research, Vol.4,Issue.9,,ISSN:2229-5598,October 2013.
- N.Seethamma, V. Srinivasa Rao, “Implementation of multiple SIC vectors for applications in BIST Schemes”, International journal association of engineering & Technology for skills development, Issue 2,Vol 3,September,2014.
- N.seethamma V. Srinivasa Rao, “Design and Implementation of multiple sic vectors for theory and application in BIST schemes”, International journal for research in applied science and engineering technology, Issue 3 vol 4,November,2014.
- S. Harsha Sree, S. Hanumantha Rao “A NEW METHODOLOGY FOR THE DESIGN OF MULTIPLIERS FOR EFFICIENT AREA-POWER SAVINGS” International Journal of Management, Technology and Engineering, Volume 8, Issue X, October 2018 pp 1520-1531
- B. Madhavi, V. Srinivasa Rao ,“Implementation of High Speed Low Power Double Tail Comparator using H-Spice”, International Journal of Electrical and Electronics Engineers, vol.7, issue 02, Jul-Dec 2015, pp 79-88.
- B. Madhavi, V. Srinivasa Rao, “Delay and Energy Efficient Low-Voltage Dual Tail Comparator”,International Journal of Scientific Engineering and Technology Research(IJSETR)., vol.4, issue 35, Aug-2015, pp 7023-26.
- P.Ambica Devi,V.Srinivasa Rao, “Power Efficient Class AB Op-Amps with High and Symmetrical Slew Rate”, IJMER, Vol.6, issue 07, July-2016, pp 50-57. Scientific Indexing Value: 2.2.
- P.Ambica Devi,V.Srinivasa Rao, “Implementation Of An Efficient Class-Ab Op-Amps With High and Symmetrical Slew Rate Using H-Spice”, International Journal of advanced technology in engineering and science, Vol.4, issue 07,ISSN 2348- 7550,July-2016.
- V. Srinivasa Rao , Dr P.Rajesh Kumar , Dr Rajesh Kumar. Pullakura , “High Level Synthesis Of A 2d-Dwt System Architecture For Jpeg 2000 Using FPGAs”,International Journal of Electrical and Electronics Engineers,Vol.8,Issue 02,ISSN (O)2321-2055,July-Dec 2016.
- V.Srinivasa Rao, Dr Rajesh K Panakala, Dr Rajesh Kumar Pullakura, “An Energy Efficient and High Speed Image Compression System Using Stationary Wavelet Transform”, International Journal on Recent and Innovation Trends in Computing and Communication ISSN: 2321-8169, Volume 5, Issue 8,August 2017.
- Penumatsa Sushma Sri Naga Mowlika and Vemu Srinivasa Rao, “Energy-Efficient and High-Speed Hybrid 1-Bit Full Adder”, Microelectronics, Electromagnetics and Telecommunications, Lecture Notes in Electrical Engineering, pp 471,Springer, 2018.
- Vagu. Radha Haneesha, Vemu. Srinivasa Rao, “A BIT-PLANE DECOMPOSITION ROW-BASED PIPO VLSI ARCHITECTURE FOR HEVC”, International Journal of Research(IJR) Volume 05 Issue 20 September 2018.
- M.Prema Kumar, V.Srinivasa Rao, V.Veerraju, “Real Time Edge Detection Using DSP TMS320C6416”,Journal of Advanced Research in Dynamical and Control Systems(JARDCS), Volume 11 | 02-Special Issue, April 2019.
- V Srinivasa Rao, Dr Rajesh K Panakala, Dr Rajesh Kumar Pullakura, “Implementatıon of JPEG-XR/HD System Archıtecture for Image Compressıon”, International Journal of Innovative Research in Computer and Communication Engineering, e-ISSN: 2320-9801, Volume 8, Issue 11, November 2020.
- GV Hari Prasad,Dr P Rajeshkumar, V.Srinivasa Rao, K.Leela Bhavani “Simulation, Analysis and Comparision of SET and CMOS Hybrid Circuits using SPICE Model” at the international conference on MEMS& Optoelectronics Technologies(ICMOT-2010),Jan22-23,2010, at Swarnandhra College of Engineering & Technology,Narsapur,AP.
- V.Srinivasa Rao, Dr P.Rajesh Kumar,GV Hari Prasad, T.baby priyanka “JPEG Encoder using Low-cost FPGAs” at the International Conference on Systems,Cybernetics and Informatics(ICSCI-2010),Jan 27-30 ,2010 at Pentagram Research Centre,Hyderbad,AP.
- V.Srinivasa Rao, Dr P.Rajesh Kumar, Dr P.Rajesh Kumar M.Prema Kumar, P.Ravi Kumar “Implementation of JPEG Encoder with baseline method using low cost FPGA” at International Conference Communication, computation and Control(ICN-2010) on OCT 29-30, 2010, at Rural Engineering College, Bhalki, Karnataka, India.
- V.Srinivasa rao, G. V. Hari prasad, M.Prema Kumar, M.Alekya,T.baby Priyanka “Floating point FPGA Vs Conventional FPGAs: An objective comparison of FPGA resources for modeling performance” at Fourth National Conference signals, systems and security (NCSSS-2010) on FEB 26-27, 2010, Bannari Amman Institute of Technology, Tamil Nadu.
- V.Srinivasa rao, Dr P.Rajesh Kumar, G V Hari prasad, M.Prema Kumar, S.Ravichand “Discrete cosine transform Vs discrete wavelet transform: An objective comparison of image compression techniques for JPEG Encoder” at Fourth National Conference on signals, systems and security (NCSSS-2010) on FEB 26-27, 2010, Bannari Amman Institute of Technology, Tamil Nadu.
- Dr P.Rajesh Kumar ,V.Srinivasa rao, G V Hari prasad, M.Prema Kumar, Dr P.Rajesh Kumar “ Hardware / Software co-design of an efficient JPEG Encoder using low cost FPGAs” at National Conference on Advances in signal processing (NCASP-09) Nov 20-21,2009, Andhra University, Visakhapatnam.
- S.Ravi Chand, Balaji Tata, V. Srinivasa rao, Dr M.Sailaja “Fault tolerance in 8 bit ALU of Embedded processor” at the National Conference on Human-Computer Perception & image Processing(NCHIP’10) ,18-19 March 2010,at Vidya Academy of Science and Technology, Thrissur, Kerala.
- GV Hari Prasad,Dr P Rajesh kumar, V.Srinivasa rao, K.Leela Bhavani “Simulation, Analysis and Comparision of SET and CMOS Hybrid Circuits using SPICE Model”, 10-14 April 2010 at Swarnandhra Engineering College,Narsapur.
- Devi Bhavani Kadali, Krishna Chaitanya Nunna, Srinivasa rao Vemu “Implementation of Low-Power Multiplierb using advanced Spurious power Suppression Technique with FPGA”, 13-14 November 2010 at ANITS Sangivalasa,Vizag, AP.
- V.Srinivasa Rao, Dr P.Rajesh Kumar,GV Hari Prasad, T.Baby Priyanka “JPEG Encoder using Low-cost FPGAs”,at the International Conference on Systems, Cybernetics and Informatics(ICSCI-2010),Jan 27-30 ,2010 at Pentagram Research Centre,Hyderbad,AP.
- V.Srinivasa rao, Dr P.Rajesh Kumar, Dr P.Rajesh Kumar M.Prema Kumar, P.Ravi Kumar ,“Implementation of JPEG Encoder with baseline method using low cost FPGA”, at International Conference Communication, computation and Control(ICN-2010) on OCT 29-30, 2010, at Rural Engineering College, Bhalki, Karnataka, India.
- V. Srinivas Rao, Dr. P. Rajesh Kumar, G. V. Hari Prasad, T. Baby Priyanka, “JPEG Encoder Using SPARTAN-3E FPGAS”,at the international conference on MEMS & Optoelectronics Technologies(ICMOT-2010),Jan22-23,2010, at Swarnandhra College of Engineering & Technology,Narsapur,AP.
- B Prathyusha Mani, V.Srinivasa Rao, “Efficient implementation of floating point reciprocator on FPGA”,International conference on Nanoscience, Engineering & Advanced computing (ICNEAC – 2011), Organized by Swarnandhra College of engineering& Technology, Narasapur, July 8-10, 2011, pp 383-387.
- B.Tejaswi, V.Srinivasa Rao, “Voice activated controller for dental chair equipment and its movements”, National conference on assistive technology, organized by BVRIT, Narasapur, during 29-31 July 2011.
- B Prathyusha Mani, V Srinivasa Rao , “Efficient Implementation of Floating-Point Reciprocator on FPGA”,International Conference On Nanoscience, Engineering & Advanced Computing (ICNEAC-2011) ,September 12-13,2011.
- B Prathyusha Mani, V Srinivasa Rao, “Design And Implementation Of Floating Point Divider On FPGA”,International Conference on Communication and Electronics Information – ICCEI 2012,Jan .14-15, 2012, Mumbai, India.
- K.Bhuvaneswari, V.Srinivasa Rao ,“Dynamic Partial Reconfiguration in Low-Cost FPGAs”,at Global Conference on Recent Tends in Electronic Communication Engineering, Power and Control(ECEPC-2013) on Sep7-8,2013,Jawaharlal Nehru University, New Delhi, India.
- B. Madhavi, V. Srinivasa Rao “Implementation of High Speed Low Power Double Tail Comparator using H-Spice” International Conference on Recent Innovation in Science, Engineering and Management held on 22nd November 2015 at Jawaharlal Nehru University, New Delhi.
- B. Madhavi, V. Srinivasa Rao, “Energy Efficient High Speed Low-Voltage Dual Tail Comparator”,International Conference on Developments in Engineering Research conducted by International Association of Engineering & Technology for skill Development held on September 2nd, 2015 at Vijayawada.
- Vagu Radha Haneesha and Vemu Srinivasa rao, “Implementation of an Area Efficient and High Speed VLSI Architecture for HEVC”,International Confrence on Research Advancements in Applied Engineering Sciences,Computer and Communication Technologies (ICRAAESCCT) ,July 2018,Narsapur,Telangana ,India.
- P. Ambica Devi , V. Srinivasa Rao, “Implementation Of An Efficient Class-AB Op-Amps With High And Symmetrical Slew Rate Using H-Spice”,5th International Conference on Science, Technology and Management (ICSTM), India International Center,NewDelhi,ISBN:978-93-86171-00-9,30th July 2016.
- V Srinivasa Rao,Rajesh K Panakala, Rajesh Kumar Pullakura, “Implementation of A 2d-DWT System Architecture For Jpeg2000 Using MATLAB and DSP”,2016 International Conference on computation system and Information Technology for Sustainable Solutions(CSITSS),Pages:86-90,DOI:10.1109/CSITSS.2016.7779446,IEEE Conference Publications,Oct,2016.
- V.Srinivasa Rao, Rajesh K Panakala, Rajesh Kumar Pullakura, “Image Compression using DWT” International conference ICRISHEM-2016, at G V P college of Engineering, Visakhapatnam on 21-22 August 2016.
- V. Srinivasa Rao, Rajesh K Panakala, Rajesh Kumar Pullakura,”An Efficient 2D-Discrete Wavelet Transform Architecture For Jpeg 2000 Using Field Programmable Gate Arrays, “Fifth International Conference on Recent Trends in Information Processing & Computing IPC-2016,Bangalore,November 12-13,2016.
- V.Srinivasa Rao,Rajesh K Panakala, Rajesh Kumar Pullakura,“An Area Efficient and High Speed EBCOT For JPEG2000 Using Cadence EDA Tools”,International Conference ,ICAMT–Elsevier Materials Today: Proceedings at Dadi Institute of Technology,Anakapalli,Visakhapatnam,27-28 December,2016.
- Srinivasa Rao Vemu; P. S. S. N. Mowlika; S. Adinarayana, “An energy efficient and high speed double tail comparator using cadence EDA tools”, International Conference on Algorithms, Methodology, Models and Applications in Emerging Technologies (ICAMMAET),Feb,2017.
- Vagu Radha Haneesha ,Vemu Srinivasa Rao , S.Adinarayana, “Design and Implementation of an Efficient VLSI Architecture for 10T Full Adder used in Ultra Low Power Applications”,6th international conference(Springer),India 2019,1-2 November,2019.
- K.Murthy raju ,Vemu Srinivasa Rao , “Escalation of Energy Performance in Many user-Several inputs and Several output System with Spectral Ability Compulsion”,5th international conference(Springer),ICMEET 2019,6-7 December,2019.
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- Got 59 percentile in GATE 1997
- Got 3256 rank in EAMCET 1992
- International journal of material science
- NPTEL Course on “Software Defined Radio and Applications”.
- NPTEL Course on “CMOS digital VLSI Design”.
- NPTEL Course on “Wireless Applications towards 5G”.
- NPTEL Course on “Outcome Based Education”.
- NPTEL Course on Ethical Hacking
- NPTEL Course on Cyber Security and Privacy
- NPTEL Course on Accreditation and Outcome based Learning
- NPTEL Course on evolution of air interface towards 5G.
- NPTEL Course on computer networks and internet protocol
- NPTEL Course on the joy of computing using python
- A certificate course on architecting of smart IOT devices in course era
- A certificate course data visualization in course era
- A certificate course on creating your first C++ application in course era
- A certificate course spread sheets for beginners using google sheets in course era
- A certificate course support vector machine classification in python in course era
- A certificate course facial expression recognition in course era
- A certificate course create first chat bot using python in course era
- A certificate course on introduction to python in course era
- A certificate course on image super resolution using auto encoders in keran in course era
- A certificate course on getting started with power BI desktop in course era
- A certificate course create yoyr first python program in course era
- A certificate course introduction to project management in course era
- A certificate course on Graphics designin course era
- A certificate course business writing in course era
- A certificate course on moving to the cloud in course era
- A certificate course on how computer works in course era
- A certificate course on TCP/IP advanced in course era
- A certificate course on introduction to TCP/IP in course era
- A certificate course on write professional emails in English in course era
- A certificate course on leadership and emotional intelligence in course era
- A certificate course on architecting of smart IOT devices in course era
- A certificate course on IT project management in course era
- A certificate course on peer to peer local area networks in course era
- A certificate course on satellite communication in course era
- A certificate course on fundamentals of network communication in course era
- A certificate course on basic for suceess in course era
- A certificate course on AI for everyone in course era
- A certificate course on AI for everyone in course era.
- One day workshop on MAT Lab & It’s Applications 17th November,2014.
- 2- day workshop on Analog and Digital CMOS IC Design flow using Mentor Graphics EDA tools during 5th-6th October,2015.
- 5-day workshop on Analog Integrated Circuit Design and ASIC Implementation using CADENCE EDA Tools during 6th -10th July,2016.
- 6-day workshop on VLSI Design during 10-15 July,2017.
- 5-day workshop on FDP on Recent Advancements in VLSI Technology & Design using EDA Tools during 7th -11th January,2019
- Five Day Workshop On Industrial Exposure on Emerging trends in Chip Design(RTL, DFT, Physical Design) during 18-22 January, 2023.
- A Two Day Workshop on “Industry exposure on Emerging Technologies in Chip design (Layout,Physical design)” during 19-20 Jan,2023.
- Attended a Two week AICTE Staff Development Programme on Analog IC Design at NIT Calicut.
- Attended a one week AICTE Short Term Tanning Programme on Signal, Image and Speech processing at NITK, Surathkal.
- Attended A three day national level workshop on Microwave Electronics WOME 2007 at SVECW Bhimavaram.
- Attended AICTE sponsored two day national level seminar on Vision 2020 for Communications at KLCE- Vijayawada.
- Attended a two day National workshop on DSP tools at Aditya Engg College- Kakinada.
- Attended a two day workshop on DSP tools at KITS-Warangal.
- Attended a one week workshop on “Management capacity enhancement program” at IIM Indore,7th-15th October,2015.
- Attended a Five Day workshop on “Trends in Reconfigurable SOC Design”at NIT Warangal from November 25-30,2018.
- Attended a Six Day training program on “Student counseling and career guidance” at SVECW, Bhimavaram by NITTTR, Chennai.
- Attended a Six Day training program on “Quality Improvement Programme on Teaching aids” at Sir C.R.Reddy Engg.College, Eluru by NITTTR, Chennai.
- Attended a Six Day training program on “Quality Improvement Programme on Instructional Design and Delivery” at SVECW, Bhimavaram by NITTTR, Chennai.
- Attended a four day training program on “Think,Technology,Transform”at VEDIC Hyderabad.
- Attended a four day training program on “Inspire, Impact,Introspect ”at VEDIC Hyderabad.
- Attended a four day training program on “Advanced Research Training “at VEDIC Hyderabad.
- AICTE Recognized Faculty Development Programme on Data Science using PythonConducted by Computer Science and Engineering Department at NITTR Chandigarh.
- AICTE Recognized Faculty Development Programme On Latest Wireless Technologies Conducted by Electronics and Communication Engineering Department at NITTR Chandigarh..
- AICTE Recognized Faculty Development Programme On Data Science using R Conducted by Computer Science and Engineering Department at NITTR Chandigarh.
- AICTE Recognized Faculty Development Programme On Effective Curriculum Implementation Conducted by Curriculum Development Centre Department at NITTR Chandigarh.
- AICTE Recognized Faculty Development Programme On Image and Embedded Processing at NITTR Chandigarh.
- AICTE Recognized Faculty Development Programme On Technological Interventions using Wireless Communication at NITTR Chandigarh.
- AICTE Recognized Faculty Development Programme On VLSI Physical Design Techniques at NITTR Chandigarh.
- AICTE Recognized Faculty Development Programme On outcome Based Curriculum at NITTR Chandigarh.
- AICTE sponsored QIP Short Term Course on Visual Cognition at NITTR Chandigarh.
- AICTE Recognized Faculty Development Programme on VLSI Physical Design Techniques at NITTR Chandigarh.
- AICTE Recognized Faculty Development Programme on Academic Leadership Enhancement in Technical Institutions at NITTR Chandigarh.
- AICTE Recognized Faculty Development Programme on Leadership and TeamWork for performance Excellence at NITTR Chandigarh.
- AICTE Recognized Faculty Development Programme on Communication and Presentation Skills at NITTR Chandigarh.
- AICTE Recognized Faculty Development Programme on Image and Embedded Processing at NITTR Chandigarh.
- AICTE Recognized Faculty Development Programme on Evaluation & Setting of Question Papers at NITTR Chandigarh.
- AICTE Recognized Faculty Development Programme on Role of Teachers and Educational Institutes in Unnat Bharat Abhiyan (UBA) at NITTR Chandigarh.
- AICTE Recognized Faculty Development Programme on Open Source Cyber Security Tools at NITTR Chandigarh.
- AICTE Recognized Faculty Development Programme on Real World Applications of Microcontrollers at NITTR Chandigarh.
- AICTE Recognized Faculty Development Programme on artficial Neural Networks and Fuzzy Logic at NITTR Chandigarh.
- AICTE Recognized Faculty Development Programme on Employability Skills for Industry 4.0 at NITTR Chandigarh.
- AICTE Recognized Faculty Development Programme on Nanoelectronics Devices and Circuits Design at NITTR Chandigarh.
- AICTE Recognized Faculty Development Programme On Embedded World at NITTR Chandigarh.
- Training program on Compiling faculty information and contribution at NITTR Bhopal.
- Short Term Course on “Artificial Intelligence and Its Applications” Organized jointly by National Institute of Technical Teachers Training & Research Chandigarh and Dr. B. R. Ambedkar National Institute of Technology Jalandhar.
- AICTE Recognized Faculty Development Programme on Digital and Analog VLSI Design at NITTR Chandigarh..
- Placement coordinator since 2012
- Department coordinator for Criteria 5 in NAAC
- Module Coordinator – UG NBA (Since 2014)
- Coordinator for Coconut rope Intervention at STI Hub
- Counsellor & mentor
- Integrated Circuits applications lab incharge
- Member of department development committee
